feat: port labels on component gates + persistent internal state
Show input/output labels next to ports on custom component chips, and persist internal gate state between evaluations so latches and flip-flops retain their values correctly. Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
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@@ -162,6 +162,23 @@ function drawComponentGate(gate) {
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ctx.fillStyle = '#444';
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ctx.fillText(getGateLabel(gate), gate.x + w / 2, gate.y + h - 6);
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// Get port labels from the component definition
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const comp = gate.component;
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const inputLabels = [];
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const outputLabels = [];
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if (comp) {
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const inputIds = comp.inputIds || [];
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const outputIds = comp.outputIds || [];
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for (const id of inputIds) {
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const g = comp.gates.find(g => g.id === id);
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inputLabels.push(g?.label || '');
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}
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for (const id of outputIds) {
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const g = comp.gates.find(g => g.id === id);
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outputLabels.push(g?.label || '');
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}
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}
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// Input ports
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getInputPorts(gate).forEach(p => {
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const isPortHovered = state.hoveredPort &&
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@@ -178,6 +195,16 @@ function drawComponentGate(gate) {
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ctx.strokeStyle = isPortHovered ? '#fff' : '#555';
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ctx.lineWidth = 1.5;
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ctx.stroke();
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// Port label (inside the gate, to the right of the port)
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const label = inputLabels[p.index];
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if (label) {
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ctx.font = '9px "Segoe UI", system-ui, sans-serif';
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ctx.fillStyle = '#aaa';
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ctx.textAlign = 'left';
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ctx.textBaseline = 'middle';
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ctx.fillText(label, p.x + PORT_R + 4, p.y);
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}
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});
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// Output ports
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@@ -195,6 +222,16 @@ function drawComponentGate(gate) {
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ctx.strokeStyle = isPortHovered ? '#fff' : '#555';
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ctx.lineWidth = 1.5;
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ctx.stroke();
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// Port label (inside the gate, to the left of the port)
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const label = outputLabels[p.index];
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if (label) {
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ctx.font = '9px "Segoe UI", system-ui, sans-serif';
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ctx.fillStyle = '#aaa';
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ctx.textAlign = 'right';
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ctx.textBaseline = 'middle';
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ctx.fillText(label, p.x - PORT_R - 4, p.y);
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}
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});
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}
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